CAD Engineer - Formal Verification

As a CAD Engineer specializing in Formal Verification at Apple, you'll be part of the Silicon Technologies group, working on designing and manufacturing next-generation, high-performance, power-efficient processors and system-on-chip (SoC). You'll play a crucial role in developing, maintaining, and enhancing formal verification flows that enable other Apple engineers to create products for millions of customers worldwide.

Key responsibilities include:

• Developing, maintaining, and enhancing systems for executing formal verification tools
• Supporting existing Jasper reset analysis, SEC, and formal proofing flows
• Debugging vendor tool problems and assisting designers/formal verification teams
• Creating new software and technologies to enable efficient product development

You'll work on various applications within formal verification, such as formal property checking, low power, connectivity checks, sequential equivalence checking (SEC), and coverage. The role offers diverse opportunities, from detailed application profiling and tuning to developing Continuous Integration/Deployment pipelines and managing large-scale compute clusters.

This position requires a blend of technical skills, creativity, and attention to detail. You'll collaborate with other CAD teams in various functional front-end areas and have the opportunity to integrate your ideas and add new features to the system.

Join Apple's Hardware team and contribute to crafting the technology that powers beloved devices used by millions worldwide.