PLL/Clocking Design Engineer

Apple is a technology company that revolutionizes the way people live across the globe, known for its innovative products and cutting-edge technology.
$143,100 - $264,200
Embedded
Senior Software Engineer
In-Person
3+ years of experience
AI · Hardware

Description For PLL/Clocking Design Engineer

Apple is seeking a PLL/Clocking Design Engineer to join their Analog-Mixed/Signal group. In this role, you will develop cutting-edge frequency synthesizers for various applications, including Compute, SoC, SerDes, and Cellular technologies. Your work will directly contribute to maintaining Apple's leadership in innovation and market presence, setting new standards in the tech industry.

Key responsibilities and qualifications include:

  1. Leveraging expertise in PLL/FLL and frequency synthesis architecture and circuit design.
  2. Developing digital and analog approaches, DCO/VCO design (both RO and LC), Fractional-N, SSC, Spur and Jitter cancellation techniques.
  3. Applying knowledge of band gaps, bias circuits, op-amps, LDOs, feedback, and compensation techniques.
  4. Understanding clocking fundamentals, including phase noise, jitter analysis, budgeting, and feedback loop dynamics.
  5. Developing System Verilog models and performing behavioral simulations.
  6. Collaborating with a team of exceptional individuals passionate about continual learning and making a substantial impact.

The ideal candidate will have a BSEE with at least 3 years of relevant experience, strong problem-solving skills, and a history of innovation and self-directed learning. This role offers the opportunity to work on revolutionary products and make a significant impact in the tech industry.

Apple offers a comprehensive benefits package, including medical and dental coverage, retirement benefits, stock options, and educational reimbursement opportunities. The base pay range for this role is between $143,100 and $264,200, depending on skills, qualifications, experience, and location.

Join Apple's culture of innovation, collaboration, and making a difference in society through groundbreaking technology.

Last updated 12 days ago

Responsibilities For PLL/Clocking Design Engineer

  • Develop cutting-edge frequency synthesizers for Compute, SoC, SerDes, and Cellular technologies
  • Design and implement digital and analog approaches for PLL/FLL systems
  • Create DCO/VCO designs for both RO and LC applications
  • Implement Fractional-N, SSC, Spur and Jitter cancellation techniques
  • Perform clocking fundamentals analysis, including phase noise and jitter analysis
  • Develop System Verilog models for behavioral simulations
  • Collaborate with team members to solve complex problems and drive innovation
  • Contribute to maintaining Apple's leadership in innovation and market presence

Requirements For PLL/Clocking Design Engineer

  • BSEE with at least 3 years of relevant experience
  • Proficiency in PLL/FLL and frequency synthesis architecture and circuit design
  • Knowledge of band gaps, bias circuits, op-amps, LDOs, feedback and compensation techniques
  • Understanding of clocking fundamentals, phase noise, jitter analysis, budgeting, and feedback loop dynamics
  • Skills in developing System Verilog models and performing behavioral simulations
  • Ability to design/debug RTL (preferred)
  • Exceptional focus on understanding problems and their systemic impacts
  • History of innovation and self-directed learning
  • Strong teamwork capabilities
  • Proficiency with industry-standard design tools

Benefits For PLL/Clocking Design Engineer

Medical Insurance
Dental Insurance
Vision Insurance
401k
Equity
  • Comprehensive medical and dental coverage
  • Retirement benefits
  • Employee stock purchase plan
  • Discretionary restricted stock unit awards
  • Educational reimbursement for career advancement
  • Discounted Apple products and free services
  • Potential for discretionary bonuses or commission payments
  • Possible relocation assistance

Interested in this job?

Jobs Related To Apple PLL/Clocking Design Engineer

Senior Server Firmware Engineer - SBIOS

NVIDIA seeks a Senior Server Firmware Engineer for SBIOS to innovate GPU-based AI servers, focusing on UEFI and Arm boot firmware development.

Senior System Software Engineer Platform - Server Embedded Firmware

NVIDIA seeks Senior System Software Engineer for Server Embedded Firmware, focusing on microcontroller development and manageability features.

Senior Firmware Architect - Server Manageability

Senior Firmware Architect role at NVIDIA, focusing on server manageability for GPU-based AI systems. Lead innovative solutions in enterprise computing.

Senior System Software Engineer Platform - OpenBMC

NVIDIA seeks a Senior System Software Engineer for OpenBMC platform development, offering competitive salary and benefits.

Senior Platform Firmware Architect - Notebook

NVIDIA seeks a Senior Platform Firmware Architect for Notebook products to define architecture, collaborate with stakeholders, and drive reliability and optimization.