RFIC - PLL Design Engineer

Apple's wireless RFIC team is seeking an experienced RFIC-PLL Design Engineer to join their innovative Hardware team in developing cutting-edge wireless solutions. This role sits at the heart of Apple's wireless SoC design group, with a direct impact on delivering groundbreaking wireless connectivity solutions to hundreds of millions of products worldwide.

As an RFIC-PLL Designer, you'll be responsible for providing analog and digital PLL solutions for wireless SoC and driving them to mass production. You'll work with sophisticated projects that push the boundaries of performance, collaborating across multiple teams to transform improved hardware elements into coordinated designs that continually outperform previous iterations.

The position requires extensive experience in RF/analog and mixed-signal design, particularly in designing fractional N Synthesizers, Digital PLLs, Analog PLLs, and LO-Gen for both high-performance and low-power applications. You'll be working with state-of-the-art tools and technologies, including Cadence Virtuoso, Spectre RF, Matlab, and EM simulation tools.

The role offers a competitive compensation package, including a base salary range of $175,800 to $312,200, plus opportunities for stock awards, bonuses, and comprehensive benefits. You'll be part of Apple's vertically integrated engineering team, working alongside experts in RF/Analog architecture, Systems/PHY/MAC, VLSI/RTL design, and various other specialized areas.

This is an excellent opportunity for a seasoned professional with 10+ years of experience who wants to make a significant impact on Apple's wireless technology development, working on products that reach millions of users worldwide. The position offers both technical challenges and leadership opportunities, making it ideal for someone who wants to push the boundaries of wireless system capabilities while growing their career at one of the world's most innovative technology companies.