Wireless SOC Design Verification Engineer

As a Design Verification Engineer on our team, you'll be at the center of the verification effort within our silicon design group responsible for crafting and productizing state-of-the-art Wireless SoCs. This position comes with responsibility for pre-silicon RTL verification of block and top-level SOC, being comfortable with all areas of SoC Design Verification engineering, with an ability to thrive in a dynamic multi-functional organization, debate ideas openly, and deliver on complex Wireless protocol chip requirements.

Key responsibilities include: • Understanding details of High Efficiency SOC Architecture, standard SOC peripherals such as SPI, I2C, UART, Timer, DMA, memory management schemes, low-power spec, multi-processor systems, DDR, PCIe, Memory Controller Subsystems, USB, PLL, power up, Secured Boot schemes. • Deliver on Power Management designs using low-power methodologies and power up-down scenarios using UPF simulations. • Develop coverage-driven verification plans from specifications, review, and refine to achieve coverage targets. • Architect UVM-based highly reusable test benches and integrate complex multi-instance VIPs, subsystem test benches, and test suites to SOC level. • Achieve targeted coverage, work with design, architecture, SW, FW, and external IP delivery teams to efficiently integrate and verify overall SOC design. • Work closely with DV methodology architects to improve verification flow.

As part of our team, you will have the opportunity to verify a set of complex SOCs. Our team integrates multiple sophisticated IP-level DV environments, crafts highly reusable best-in-class UVM Testbenches, implements effective coverage-driven and directed test cases, deploys new tools, and implements methodologies to improve quality of tape-out readiness. By collaborating with other product development groups across Apple, you can push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world! You will be able to learn all aspects of a large-scale SOC, different types of SOC architectures, many high-speed layered protocols, methodologies on low-power architecture, best-in-class DV methodology. You will be able to gain knowledge on wireless protocols, FW-HW interactions, complexities of multi-chip SOC debug architecture, etc.