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DFT Engineer

A global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.
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Senior Software Engineer
In-Person
5,000+ Employees
4+ years of experience
Enterprise SaaS · Hardware
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Description For DFT Engineer

Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking a DFT (Design for Testability) Engineer for their Switching Group (CSG). This is a highly visible position where you'll be part of an elite implementation team performing complete RTL to production workflows.

The role combines hardware engineering expertise with software implementation, focusing on critical testability aspects of semiconductor design. As a DFT Engineer, you'll be responsible for the entire testing lifecycle, from initial RTL DFT insertion through to final test program deployment. This position requires expertise in various testing methodologies including Boundary scan, MBIST, SCAN, and SCAN compression.

The ideal candidate will bring at least 4 years of experience and a strong educational background in Electrical Engineering. You'll work with industry-standard tools like TETRAMAX, DFT compiler, FAST SCAN, TESTKOMPRESS, and Tessent. This role offers the opportunity to work on cutting-edge semiconductor projects while being part of a team that values innovation and technical excellence.

Working at Broadcom means joining a company that's at the forefront of technology innovation, with a strong commitment to diversity and inclusion. The position is based in Tel Aviv University, Israel, offering the chance to work in one of the world's leading tech hubs. This role provides an excellent opportunity for career growth and the chance to work on complex, challenging projects that impact the semiconductor industry.

Last updated 3 months ago

Responsibilities For DFT Engineer

  • Ownership of testability, methodology and execution for assigned projects
  • RTL DFT insertion to final test program bring-up
  • Implementation of Boundary scan, MBIST, SCAN and SCAN compression
  • Generation of all patterns
  • Work on chips final test programs

Requirements For DFT Engineer

  • Bachelor's degree in Electrical Engineering
  • Minimum 4 years of experience
  • Knowledge of SCAN and ATPG
  • Knowledge of MBIST (Memory Build In Self-Test)
  • Knowledge of LogicBist (Logic Build In Self-Test)
  • Experience with TETRAMAX / DFT compiler
  • Experience with FAST SCAN / TESTKOMPRESS / Tessent
  • Strong knowledge in DFT domain from concept through design implementation and ATE application

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