ASIC Power Management Architect, Silicon
Description For ASIC Power Management Architect, Silicon
Join Google's innovative hardware team as an ASIC Power Management Architect, where you'll be at the forefront of developing custom silicon solutions that power Google's direct-to-consumer products. This role combines advanced power management architecture with practical implementation, requiring expertise in both hardware and software aspects of system design.
You'll be responsible for defining and implementing power management architectures for complex ASICs, working with functions like image compute and CPU/GPU systems. The role demands a deep understanding of power management principles, including Dynamic Voltage Frequency Scaling (DVFS) and thermal management strategies.
As part of Google's mission to organize the world's information and make it universally accessible, you'll contribute to creating radically helpful experiences by combining the best of Google AI, Software, and Hardware. The team focuses on making computing faster, seamless, and more powerful, ultimately aiming to improve people's lives through technology.
This position offers the opportunity to work with cutting-edge technology and collaborate with world-class experts in silicon design, software development, and system architecture. You'll be instrumental in shaping the next generation of Google's hardware experiences, ensuring optimal performance while managing power and thermal constraints.
The ideal candidate will bring a strong background in electrical engineering or computer science, with specific expertise in power management validation and system-level design. This role provides an excellent opportunity to impact millions of users worldwide while working on some of the most advanced hardware systems in the industry.
Responsibilities For ASIC Power Management Architect, Silicon
- Define ASIC power management architecture details for an ASIC that includes functions such as image compute, CPU/GPU
- Prototype and validate for the next generation SoC power management system
- Analyze implementation and models, and test the performance of power management solutions
- Produce detailed documentation for power management schemes implementation
- Collaborate with software and power architecture team to build system level designs and methods
Requirements For ASIC Power Management Architect, Silicon
- Bachelor's degree in Electrical Engineering or equivalent practical experience
- 5 years of experience in power management or post-silicon measurements and validation
- 3 years of experience with power management validation
- Knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation
- Knowledge of the impact of software and architectural design decisions on power and thermal behavior
Jobs Related To Google ASIC Power Management Architect, Silicon
