Taro Logo

RTL Design Engineer, Multimedia and Machine Learning, Silicon

Google's mission is to organize the world's information and make it universally accessible and useful.
Embedded
Mid-Level Software Engineer
3+ years of experience
AI
This job posting may no longer be active. You may be interested in these related jobs instead:

Description For RTL Design Engineer, Multimedia and Machine Learning, Silicon

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will be responsible for RTL design development of camera and machine learning designs. This includes RTL coding, lint cleanup, SoC IP release flows, architecture, micro-architecture, power, performance and area (PPA) optimizations, test planning collaboration, and coverage reviews and closure for high quality and optimized Core IP deliveries.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities: • Perform Verilog/SystemVerilog RTL coding, function/performance simulation debug, and Lint/CDC/FV/UPF checks. • Perform RTL verification using industry standard methodologies. Participate in test planning and coverage analysis. • Develop RTL implementations that meet engaged power, performance and area goals. • Participate in synthesis, timing/power closure and FPGA/silicon bring-up. • Create tools/scripts to automate tasks and track progress.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law.

Last updated 9 months ago

Responsibilities For RTL Design Engineer, Multimedia and Machine Learning, Silicon

  • Perform Verilog/SystemVerilog RTL coding, function/performance simulation debug, and Lint/CDC/FV/UPF checks
  • Perform RTL verification using industry standard methodologies. Participate in test planning and coverage analysis
  • Develop RTL implementations that meet engaged power, performance and area goals
  • Participate in synthesis, timing/power closure and FPGA/silicon bring-up
  • Create tools/scripts to automate tasks and track progress

Requirements For RTL Design Engineer, Multimedia and Machine Learning, Silicon

Python
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
  • Experience with logic synthesis techniques to optimize RTL code, performance and power, and low-power design techniques
  • Experience with a scripting language such as Perl or Python

Interested in this job?