Senior Silicon DFT Engineer
Description For Senior Silicon DFT Engineer
Google Cloud is seeking a Senior Silicon DFT Engineer to join their Technical Infrastructure team. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products. As a DFT Senior Engineer, you'll be at the forefront of DFT Architecture and design, handling devices of extreme complexity through to production.
The position involves providing technical leadership in DFT, developing flows, automation, and methodology, while planning DFT activities and tracking quality matrices throughout project lifecycles. You'll be responsible for sign-off DFT to tapeout and will work closely with various engineering teams to ensure seamless integration of DFT requirements.
The Technical Infrastructure team is fundamental to Google's product portfolio, developing and maintaining data centers and building next-generation Google platforms. The team takes pride in being the engineers' engineers, focusing on keeping networks running optimally to ensure the best user experience.
This role offers the opportunity to work with cutting-edge technology and contribute to products used by millions worldwide. You'll be part of a diverse team that pushes boundaries and shapes the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ideal candidate should have strong experience in ATPG methods, people management, and DFT design and verification. Additional expertise in JTAG and iJTAG protocols, post-silicon test engineering, and SoC cycles would be advantageous. The role requires both technical expertise and leadership skills to guide a team and manage complex projects effectively.
Google offers a collaborative work environment and is committed to building a diverse and inclusive workforce. The company provides equal employment opportunities and considers accommodations for applicants' needs. This position requires English proficiency to facilitate efficient global collaboration.
Responsibilities For Senior Silicon DFT Engineer
- Lead and execute activities in the design, implementation, and verification of DFT solutions for large-scale ASICs
- Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG)
- Work with other Engineering teams to ensure that DFT requirements are met and mutual dependencies are managed
- Manage the DFT team's workload and deliverables, provide technical leadership and guidance to the team
- Lead DFT execution of a silicon project - planning, execution, tracking, quality, and signoff
Requirements For Senior Silicon DFT Engineer
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, or equivalent practical experience
- 8 years of experience in Automatic Test Pattern Generation (ATPG) methods
- 4 years of people management experience developing employees
- Experience with multiple projects in DFT design and verification, DFT specification, definition, architecture, and insertion
- Experience with DFT techniques and tools, ASIC DFT synthesis, simulation, and verification flow
- Experience in leading DFT activities throughout an ASIC development flow
Benefits For Senior Silicon DFT Engineer
- Equal employment opportunity
- Inclusive work environment
- Global collaboration opportunities
- Accommodation for special needs
