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Principal Design Engineer, IC Layout

Impinj is a leading RAIN RFID provider and Internet of Things pioneer, inventing ways to connect every thing to the Internet.
$168,000 - $267,000
Embedded
Principal Software Engineer
In-Person
12+ years of experience
IoT
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Description For Principal Design Engineer, IC Layout

Impinj, the world's #1 provider of RAIN RFID products and solutions, is expanding our Layout Design Engineering group, an integral part of the Silicon Engineering department. This principal layout designer role will be key in the success of the department and company.

As a Principal Design Engineer for IC Layout, you will:

  • Lead full chip floorplan development, integration, and tape-in for industry-leading RFID endpoint IC and RFID Reader IC products
  • Collaborate with circuit designers and block level layout designers to create initial tops down IC floorplans
  • Work on power supply strategy and signals distribution between blocks
  • Conduct layout reviews for power/ground routing, electro migration, matching, and signal coupling/integrity
  • Complete full chip activities such as seal-ring integration, bump integration, dummy fill, full chip DRC, LVS, density and DFM checks
  • Perform detailed transistor-level layout of RF and analog circuit blocks

Requirements:

  • 12+ years of industry experience in custom Analog RF and mixed-signal layout
  • Expert knowledge of Analog layout tools and methodologies
  • Proficiency in Cadence Virtuoso Schematic and Layout tools, and Cadence/Mentor layout verification tools
  • Experience with layout design rules and flows for process technology nodes from 90nm to 16nm
  • Strong analytical and problem-solving skills
  • Excellent communication and interpersonal skills

Impinj offers competitive benefits, including healthcare, 401(k) with company match, and an open paid time-off policy. The company is committed to creating a diverse and inclusive work environment and welcomes applicants from all backgrounds.

Join Impinj to work on groundbreaking IoT technology in a collaborative environment with spectacular views from our Seattle headquarters or at our Brazilian site in Porto Alegre.

Last updated 9 months ago

Responsibilities For Principal Design Engineer, IC Layout

  • Lead full chip floorplan development, integration, and tape-in
  • Collaborate with circuit designers on IC floorplans
  • Work on power supply strategy and signals distribution
  • Conduct layout reviews
  • Complete full chip activities
  • Perform detailed transistor-level layout of RF and analog circuit blocks

Requirements For Principal Design Engineer, IC Layout

Linux
  • 12+ years of industry experience in custom Analog RF and mixed-signal layout
  • Expert knowledge of Analog layout tools and methodologies
  • Proficiency in Cadence Virtuoso Schematic and Layout tools
  • Experience with layout design rules and flows for process technology nodes from 90nm to 16nm
  • Strong analytical and problem-solving skills
  • Excellent communication and interpersonal skills

Benefits For Principal Design Engineer, IC Layout

Medical Insurance
401k
  • Healthcare benefits
  • 401(k) plan
  • Company match
  • Open paid time-off policy

Interested in this job?