Senior DFT Methodology Engineer

NVIDIA is seeking a Senior DFT Methodology Engineer to join their DFX Methodology Group. This role involves working on groundbreaking innovations in test techniques, in-system test architecture, and verification and post-silicon validation for complex semiconductor chips.

Key responsibilities include:

• Developing next-generation test architectures
• Implementing new designs in test access mechanisms, high-speed test interfaces, and in-system test architecture
• Developing and deploying In-System Test (IST) methodologies for scan architecture, ATPG, MBIST, and IOBIST applications
• Mentoring junior engineers on test designs and trade-offs

Requirements:

• BSEE with 5+, MSEE with 3+, or PhD with 2+ years of experience in DFT, system architecture, or RTL design
• Strong understanding of DFT topics, fault modeling, ATPG, and fault simulation
• Experience with MBIST and IOBIST fundamentals
• Knowledge of 3D stacked and dielet/chiplet based designs, and UCIe protocol
• Familiarity with high-speed interface architectures (PCIe, USB3, DDR)
• Excellent analytical skills in verification and validation of complex designs
• Experience in Silicon debug and bring-up on ATE or SLT platforms
• Strong programming skills in Perl, Python, or Tcl
• Outstanding communication skills

NVIDIA offers competitive salaries, comprehensive benefits, and the opportunity to work with some of the most talented people in the industry. The company is committed to fostering diversity and is an equal opportunity employer.

Join NVIDIA to be part of a team that's constantly evolving and tackling challenging problems that matter to the world.