Signoff PDN CAD Engineer

Join QCOM Technologies Inc vibrant Global CAD team pushing the limits of Signoff solutions for the Snapdragon chips powering billions of mobile devices. The position requires Signoff PDN experience in IR drop, Electromigration (EM) or/and Thermal and CAD development skills to define and develop tools and methodologies for accuracy, compute, in close collaboration with Snapdragon Physical Design and Timing/PDN teams. Qualcomm is using leading edge internal and EDA technologies in the Signoff domain, including pioneering in genAI/ML, and developing good-by-construction hierarchical solution, as well as enabling the latest STA, IR, EM, Thermal features to reduce conservatism in Signoff.

Responsibilities include:

• Improving PDN methodology for diverse Snapdragon chips
• Developing automation and enablement of new features for advanced process nodes
• Providing solutions to Snapdragon design teams
• Interfacing with EDA vendors
• Setting up and maintaining regression of complex STA and PDN designs
• Correlation of STA tools with spice, and PDN tools with solver and spice
• Innovating on PDN and Timing techniques

Preferred Qualifications:

• Bachelor's, Master's, or PhD in Computer Engineering, Electrical Engineering, or related field
• 1-4 years of experience in Signoff PDN or/and Timing of SoCs
• 1-4 years of experience with scripting tools and programming languages (Python and TCL preferred)
• Experience with PDN analysis tools such as Ansys Red-Hawk-SC (RHSC) or Cadence Voltus

Qualcomm offers competitive compensation, including annual discretionary bonus, RSU grants, and a comprehensive benefits package designed to support your success at work, home, and play.