Wireless HW Design Engineer-Sr

Qualcomm is a leading technology company specializing in wireless telecommunications and semiconductor design.
Hardware
Senior Software Engineer
In-Person
2+ years of experience
AI
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Description For Wireless HW Design Engineer-Sr

Qualcomm is seeking a Wireless HW Design Engineer-Sr for their Bangalore, India office. This role is part of the Engineering Group, specifically in Hardware Engineering. The position focuses on high-speed and low-power 5G Modem Hardmacro Implementation.

Key responsibilities include:

  • Front-end implementation of complex 5G hardmacro designs in advanced process nodes
  • Writing timing constraints, power-aware synthesis, power-aware formal verification, CLP, Primetime, PTPX, CECO
  • Optimizing datapath design for low-area, low-power, and high-frequency
  • Handling complex digital blocks with up to 4M gates in advanced process nodes (2nm / 3nm / 4nm)
  • Collaborating with RTL, DFT, and PD leads worldwide

Requirements:

  • 2-6 years of experience in Digital ASIC / Processor Design with a leading chipset company
  • Experience in Synthesis (FC, DC, Genus), Formal Verification (LEC / Formality), Conformal Low Power, PTPX, Primetime, Conformal ECO
  • Experience in UPF based power intent and synthesis, handling MV checks and CLP waiver reviews
  • Strong fundamentals in core areas: Microarchitecture, Computer Arithmetic, Circuit Design, Process Technology
  • Strong communication skills to work with design teams worldwide

Education:

  • Required: Bachelor's degree in Electrical Engineering
  • Preferred: Master's degree in Electrical Engineering

Qualcomm offers comprehensive benefits, including health coverage, wealth-building programs, and wellbeing resources. They foster a supportive, inclusive culture where employees can contribute to world-changing innovations and breakthrough technologies. The company provides continuous learning and development programs, tuition reimbursement, and mentorship opportunities.

Last updated a month ago

Responsibilities For Wireless HW Design Engineer-Sr

  • Front-end implementation of complex 5G hardmacro designs in advanced process nodes
  • Writing timing constraints, power-aware synthesis, power-aware formal verification, CLP, Primetime, PTPX, CECO
  • Optimize datapath design for low-area, low-power and high-frequency
  • Handle complex digital blocks with up to 4M gates in advanced process nodes (2nm / 3nm / 4nm)
  • Work closely with RTL, DFT and PD leads worldwide

Requirements For Wireless HW Design Engineer-Sr

Java
Python
  • Bachelor's or Master's degree in Computer Science, Electrical/Electronics Engineering, or related field
  • 2-6 years of experience in Digital ASIC / Processor Design
  • Experience in Synthesis (FC, DC, Genus), Formal Verification (LEC / Formality), Conformal Low Power, PTPX, Primetime, Conformal ECO
  • Experience in UPF based power intent and synthesis, handling MV checks and CLP waiver reviews
  • Strong fundamentals in Microarchitecture, Computer Arithmetic, Circuit Design, Process Technology
  • Strong communication skills

Benefits For Wireless HW Design Engineer-Sr

  • World-class health coverage
  • Financial planning and wealth-building programs
  • Emotional and mental health support
  • Wellbeing programs and resources
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

Interested in this job?