Intel

I was contacted by a hiring manager via email, and we set up an hour-long phone screen about a week later. I was asked a bunch of questions about DRC methodology, even though my expertise was in LVS. I was able to answer them fairly well, though, and

It was a phone coding challenge—no IDE or development platform was available. It was an unscheduled interview where the interviewer called me out of the blue one day. I had to describe code to my interviewer because there was no online platform for

1 screening - 5 onsite rounds. Tested on SystemVerilog. * Write FIFO logic code. * Basics of UVM. * Design questions like counter, FSM, and pipelining. * Verilog questions on execution of the code. * Determine output for a snippet of code in Verilo