Taro Logo

ASIC Design Engineer Interview Experience

March 1, 2010
Neutral ExperienceNo Offer

Process

Interviewers ask lots of questions about the projects I did in school and a few logic design questions and some questions about Verilog

Questions

Please design a divide by 3 divider.

Was this helpful?

Interview Statistics

The following metrics were computed from 48 interview experiences for the Marvell Technology ASIC Design Engineer role.

Success Rate

33%
Pass Rate

Marvell Technology's interview process for their ASIC Design Engineer roles is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive35%
Neutral54%
Negative10%

Candidates reported having very good feelings for Marvell Technology's ASIC Design Engineer interview process.

Marvell Technology Work Experiences