Just a job, do not expect much
Just a job, do not expect much
Some of the project is interesting and has mainstream tools.
Culture is not good.
As cheap labor, the company not care you, your join and leave.
Keep moving job to China, and layoff in US.
I will not listen :)
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Marvell Technology Interview Experiences
Staff Design Verification Engineer
First round with hiring manager. No introduction. He went right into technical questions. Asked me 3 technical questions. He looked rushed and tired. Next I went for onsite. 6 rounds. 1 staff member. Asked me standard system Verilog questions. Ni
ASIC Design Engineer
The phone interview lasts about 45 minutes and the man is patient. Every time I cannot figure out a problem, he tries to give me some hint to help me.
ASIC Design Engineer
Clock domain crossing verilog about the differences between blocking/non-blocking assignments Points you list on your resume Basic ALU questions Truth table and k-maps Frequency divider and counters DFF with synchronized reset and asynchronized reset
Staff Design Verification Engineer
United StatesMarch 6, 2026First round with hiring manager. No introduction. He went right into technical questions. Asked me 3 technical questions. He looked rushed and tired. Next I went for onsite. 6 rounds. 1 staff member. Asked me standard system Verilog questions. Ni
ASIC Design Engineer
Santa Clara, CaliforniaMarch 1, 2018The phone interview lasts about 45 minutes and the man is patient. Every time I cannot figure out a problem, he tries to give me some hint to help me.
ASIC Design Engineer
Santa Clara, CaliforniaSeptember 1, 2011Clock domain crossing verilog about the differences between blocking/non-blocking assignments Points you list on your resume Basic ALU questions Truth table and k-maps Frequency divider and counters DFF with synchronized reset and asynchronized reset
