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ASIC Design Engineer Interview Experience

April 7, 2019
Positive ExperienceNo Offer

Process

I applied online.

Three weeks later, I received a phone interview with a staff engineer. This position is related to power saving, and all the questions focused on CDC and low-power design.

The interview lasted 30 minutes.

Two weeks later, I received the onsite interview invitation.

Questions

Personal research, DVFS, CDC, Metastable, Asynchronous FIFO, Synchronizer, Level shifter, Clock gating, Power gating, Dynamic power, Leakage power.

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Interview Statistics

The following metrics were computed from 13 interview experiences for the Qualcomm ASIC Design Engineer role in United States.

Success Rate

23%
Pass Rate

Qualcomm's interview process for their ASIC Design Engineer roles in the United States is very selective, failing most engineers who go through it.

Experience Rating

Positive54%
Neutral38%
Negative8%

Candidates reported having very good feelings for Qualcomm's ASIC Design Engineer interview process in United States.

Qualcomm Work Experiences