PLL/Clocking Design Engineer

At Apple, our products are revolutionizing the way people live across the globe. Within our Analog-Mixed/Signal group, your role will be crucial in pushing the boundaries of what our technology can achieve. We are dedicated to crafting high-quality, innovative hard IPs that surpass the ordinary, adjusting to the escalating complexity of SOC/PHY designs and multiplying projects within tight production schedules.

In this role, you will leverage your expertise to develop cutting-edge frequency synthesizers for a variety of applications, including Compute, SoC, SerDes, and Cellular technologies. Your work will directly contribute to maintaining Apple's leadership in innovation and market presence, setting new standards in the tech industry.

Key responsibilities and qualifications include:

• Developing PLL/FLL and frequency synthesis architecture and circuit design
• Expertise in digital and analog approaches, DCO/VCO design (both RO and LC), Fractional-N, SSC, Spur and Jitter cancellation techniques
• Deep understanding of clocking fundamentals, phase noise, jitter analysis, budgeting, and feedback loop dynamics
• Skill in developing System Verilog models and performing behavioral simulations
• Attention to detail and systemic problem-solving
• Innovation and self-directed learning
• Strong teamwork and collaboration skills

This role offers an opportunity to work on cutting-edge technology and make a significant impact in the industry. Join Apple's culture of innovation, continuous learning, and making a difference in society through technology.