PLL/Clocking Design Engineer

At Apple, our products are revolutionizing the way people live across the globe. Within our Analog-Mixed/Signal group, your role as a PLL/Clocking Design Engineer will be crucial in pushing the boundaries of what our technology can achieve. We are dedicated to crafting high-quality, innovative hard IPs that surpass the ordinary, adjusting to the escalating complexity of SOC/PHY designs and multiplying projects within tight production schedules.

In this role, you will leverage your expertise to develop cutting-edge frequency synthesizers for a variety of applications, including Compute, SoC, SerDes, and Cellular technologies. Your work will directly contribute to maintaining Apple's leadership in innovation and market presence, setting new standards in the tech industry.

Key responsibilities and qualifications include:

• Developing PLL/FLL and frequency synthesis architecture and circuit design
• Mastering clocking fundamentals, including phase noise, jitter analysis, and feedback loop dynamics
• Performing simulations and modeling using System Verilog
• Collaborating with a team of exceptional individuals passionate about continual learning
• Demonstrating innovation, self-directed learning, and leadership skills

If you excel in dynamic settings, relish collaborative problem-solving, and seek to make a societal impact through your work, you might be the ideal candidate for our team. At Apple, you'll join a culture that encourages you to take ownership of your career, supported by colleagues committed to making a difference.

Apple offers a competitive compensation package, including base pay, potential stock awards, comprehensive benefits, and opportunities for growth and development within the company.