RFIC - PLL Design Engineer

Apple's wireless RFIC team is seeking an experienced RFIC-PLL Design Engineer to join their innovative hardware division. This role sits at the heart of wireless SoC design, where you'll be responsible for architecting, designing, and validating radio transceivers integrated into sophisticated wireless SoCs.

As part of Apple's outstanding vertically integrated engineering team, you'll work across multiple disciplines including RF/Analog architecture and design, Systems/PHY/MAC, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Your work will directly impact Apple's groundbreaking wireless connectivity solutions that reach hundreds of millions of products worldwide.

The position requires a deep technical background in RF/analog and mixed-signal design, with particular expertise in designing fractional N Synthesizers, Digital PLLs, Analog PLLs, and LO-Gen for both high-performance and low-power applications. You'll be working with cutting-edge technology in deep sub-micron RFCMOS technology and collaborating with multi-functional teams to drive innovation in wireless technology.

This is an excellent opportunity for someone who thrives on pushing the boundaries of what's technically possible and wants to make a significant impact on Apple's product ecosystem. You'll be working in San Diego, California, with a competitive base salary range of $166,600 to $296,300, plus additional benefits including stock options, comprehensive healthcare, and education reimbursement.

The ideal candidate will have at least 10 years of relevant industry experience, with a strong background in RF CMOS design and extensive experience in silicon characterization and debugging. If you're passionate about creating sophisticated, groundbreaking projects and want to be part of transforming the user experience at the product level, this role offers the perfect platform to make your mark in the industry.