SoC Power Model Engineer

As a SoC Power Model Engineer at Apple, you'll be part of the Digital Design Engineering group, responsible for designing state-of-the-art ASICs. In this highly visible role, you'll drive SOC power modeling and optimization for very power-efficient products. You'll collaborate with architects to determine interesting use-cases for simulation, create test cases, develop IP power models, and work with cross-functional teams to improve power efficiency. Key responsibilities include:

• Providing power projections for future projects based on analysis
• Working with design teams to enhance functionality for power reduction
• Developing IP power models on new architecture designs
• Collaborating with architecture, RTL, and physical design teams
• Understanding product interactions at the software and system level that impact power

You'll be at the center of SOC design efforts, integrating new ideas and working with talented engineers. This role requires a strong background in SOC power simulation and modeling, hardware power simulation, and analysis flow. Familiarity with ASIC power analysis, Verilog, System Verilog, and scripting languages like Python, Perl, or Tcl is preferred.

Join Apple's Hardware team and contribute to groundbreaking technology that impacts millions of customers worldwide. This is an opportunity to apply your engineering expertise to create innovative solutions and shape the future of power-efficient product design.