ASIC Design Engineer
Description For ASIC Design Engineer
The ASIC Design Engineer will interact internally with the Design Architect and externally with customers on aspects including physical synthesis, influencing RTL content and coding styles. The role involves defining timing constraints, interfacing with the physical design team, and focusing on low power, optimized area, max performance, and high manufacturing yield.
Key responsibilities and requirements:
- 20+ years of experience in ASIC architecture, design, development, and verification
- Strong understanding of VLSI and ASIC physical design
- Experience with synthesis and physical synthesis tools (Synopsys and Cadence preferred)
- Deep understanding of PLLs, clock networks, and STA concepts
- Ability to create and debug timing constraints
- Experience with static timing analysis tools (Synopsys PrimeTime, Cadence Tempus)
- Understanding of advanced STA concepts (POCV/SOCV/LVF, MIS, CCS/ECSM/NLDM, PBA, LOCV/SOCV)
- SPICE analysis experience
- TCL coding required, experience with other languages preferred
- Strong communication and organizational skills
- Ability to work with large amounts of data and present it clearly
- Strong debugging and problem-solving skills
The role offers a competitive salary range of $141,000 - $225,000, along with benefits including medical, dental, vision, 401(k) with company matching, ESPP, and more.
Broadcom values diversity and is an equal opportunity employer, considering qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status, or any other protected characteristic.
Responsibilities For ASIC Design Engineer
- Interact with Design Architect and customers on physical synthesis and RTL content
- Define timing constraints with customers
- Interface with physical design team for overall closure and manufacture of ASICs
- Focus on low power, optimized area, max performance, and high manufacturing yield
- Create and debug timing constraints
- Generate and understand timing reports
- Work with multiple engineers and teams across geographies
- Manage a large variety of tasks
- Debug problems and create solutions
Requirements For ASIC Design Engineer
- MS degree in Electrical Engineering or Computer Engineering
- 20+ years of related experience
- Strong understanding of VLSI and ASIC physical design
- Experience with synthesis and physical synthesis tools (Synopsys and Cadence preferred)
- Deep understanding of PLLs and clock networks
- Experience with static timing analysis tools (Synopsys PrimeTime, Cadence Tempus)
- Ability to create and debug timing constraints
- Understanding of advanced STA concepts
- SPICE analysis experience
- TCL coding required, experience with other languages preferred
- Strong communication and organizational skills
- Ability to work with large amounts of data and present it clearly
- Strong debugging and problem-solving skills
Benefits For ASIC Design Engineer
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Paid Family Leave
