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Post Silicon Validation and Application Engineer

Leading networking company delivering silicon, optics, and hardware platforms for Switching, Routing, and Wireless products.
$149,600 - $214,100
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
7+ years of experience
AI
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Description For Post Silicon Validation and Application Engineer

Join Cisco's Common Hardware Group (CHG) as a Post Silicon Validation and Application Engineer, working on groundbreaking Cisco Silicon One technology. This role combines startup culture benefits with the stability of an industry leader. You'll be part of a team delivering silicon architecture that enables customers to deploy best-of-breed solutions across data centers and enterprise networks.

As a Silicon Validation Engineer, you'll be responsible for critical ASIC bring-up and post-silicon validation, working closely with senior micro-architects, designers, and verification engineers. The role involves sophisticated test generation, infrastructure setup, and validation planning, requiring deep expertise in hardware/software interaction and networking protocols.

The position offers competitive compensation ($149,600 - $214,100) and comprehensive benefits including medical, dental, vision insurance, 401(k) with company match, and flexible vacation policies. Located in San Jose, CA, you'll be at the heart of Silicon Valley's tech innovation.

This is an excellent opportunity for experienced engineers passionate about hardware validation and testing, offering the chance to work on some of the most complex ASICs in the industry. Cisco's inclusive culture, with 30 employee resource organizations and 80 hours of paid volunteer time annually, makes it an ideal place for professional growth and impact.

The role requires significant expertise in ASIC design verification, digital design, and programming skills in multiple languages. You'll be instrumental in ensuring the successful deployment of Cisco's networking hardware across enterprise and service provider networks worldwide.

Last updated 13 days ago

Responsibilities For Post Silicon Validation and Application Engineer

  • ASIC bring-up and post-silicon validation
  • Test generation, test infrastructure setup, bring-up planning and execution
  • Work with internal and external system teams on ASIC configuration and performance
  • Triage and root cause system, SDK/Software, and customer failures
  • Build supporting tools/script/infrastructure for debugging
  • Optimize validation and productization processes

Requirements For Post Silicon Validation and Application Engineer

Python
  • Bachelor's degree +7 years of related ASIC DV experience, or Master's degree +4 years of related experience
  • Experience in digital design, systems, and microarchitecture
  • Deep understanding of SW/firmware and HW/SW interaction
  • Knowledge of networking and network protocols
  • Experience with ASIC Design verification, silicon bring-up, and post silicon validation
  • Experience with C/C++, System Verilog programming, and Scripting (Python, Perl, TCL, shell programming)

Benefits For Post Silicon Validation and Application Engineer

401k
Medical Insurance
Dental Insurance
Vision Insurance
Parental Leave
  • Up to 16 days vacation for non-exempt employees
  • Flexible vacation policy for exempt employees
  • 12 paid holidays including floating holiday
  • 80 hours paid volunteer time
  • Quality medical, dental and vision insurance
  • 401(k) with company match
  • Short and long-term disability coverage
  • Basic life insurance
  • Birthday day off

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