ASIC Design Engineer, Core IP

Global technology leader specializing in internet-related services and products.
$150,000 - $223,000
Embedded
Mid-Level Software Engineer
In-Person
5000+ Employees
5+ years of experience
AI · Consumer

Description For ASIC Design Engineer, Core IP

Google is seeking an ASIC Design Engineer to join their Core IP team, focusing on developing custom silicon solutions for Google's direct-to-consumer products. This role combines cutting-edge hardware development with Google's AI and software expertise to create innovative computing solutions. The position offers an opportunity to work on hardware experiences that impact millions of users worldwide, with a focus on performance, efficiency, and integration.

The role requires strong expertise in digital logic design, RTL development, and hardware optimization. You'll be working with advanced simulation and emulation tools, collaborating with verification and validation teams, and taking on technical leadership responsibilities. The position offers competitive compensation including base salary, bonus, equity, and comprehensive benefits.

As part of Google's hardware team, you'll contribute to the company's mission of organizing world's information and making it universally accessible. The team focuses on creating radically helpful experiences through the combination of Google AI, Software, and Hardware. This is an excellent opportunity for someone passionate about hardware design and interested in working on next-generation computing solutions at one of the world's leading technology companies.

The ideal candidate will have experience with digital logic design principles, RTL concepts, and hardware optimization techniques. Knowledge of accelerators (such as Machine Learning or GPUs) and experience with Chisel would be advantageous. The role offers the chance to work on cutting-edge technology while being part of a diverse team that pushes boundaries in hardware innovation.

Last updated 6 days ago

Responsibilities For ASIC Design Engineer, Core IP

  • Use simulation/emulation/power analysis tools and techniques to ensure power and performance meet defined specifications
  • Develop, implement, and maintain design blocks or components/part of a hardware product, and integrate design blocks or components/parts to create product subsystems
  • Engage with Verification and Silicon Validation teams to ensure functionality of the design
  • Provide input on synthesis, timing closure, and Physical Design of digital blocks
  • Take a leadership role on technical project teams and set technical direction

Requirements For ASIC Design Engineer, Core IP

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
  • Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques

Benefits For ASIC Design Engineer, Core IP

Medical Insurance
Dental Insurance
Vision Insurance
Equity
  • Base salary
  • Bonus
  • Equity
  • Comprehensive benefits package

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