Join Google's Silicon team to develop custom silicon solutions powering the future of Google's direct-to-consumer products. As an ASIC Power Management Architect, you'll be at the forefront of innovation, working on hardware experiences that impact millions of users worldwide. The role combines advanced power management architecture with practical implementation, requiring expertise in ASIC power analysis, algorithm development, and system-level optimization.
You'll work with cutting-edge technologies, defining power management architectures that balance exceptional performance with power and thermal constraints. The position demands deep technical knowledge of power components, voltage scaling, and power delivery networks, while also understanding the broader impact of software and architectural decisions on system behavior.
Google's commitment to innovation in AI, Software, and Hardware makes this an exciting opportunity to shape the next generation of technology. You'll collaborate with world-class engineers and researchers, contributing to products that make computing faster, seamless, and more powerful. The role offers the chance to work on challenging technical problems while delivering tangible impact through Google's widely-used products.
The ideal candidate combines strong technical expertise in power management with the ability to analyze and document complex trade-offs. You'll need to think both deeply about technical details and broadly about system-level implications. This position offers the opportunity to work at the intersection of hardware and software, optimizing power management across multiple design levels.
Working at Google means joining a company that values diversity, equity, and inclusion, with comprehensive benefits and a culture focused on innovation and impact. You'll be part of a team that pushes boundaries and sets new standards in silicon design and power management.