ASIC Power Management Architect, Silicon

Google organizes the world's information and makes it universally accessible and useful, combining AI, Software, and Hardware to create helpful experiences.
New Taipei, Banqiao District, New Taipei City, Taiwan
Embedded
Staff Software Engineer
In-Person
5,000+ Employees
3+ years of experience
AI · Hardware

Description For ASIC Power Management Architect, Silicon

Join Google's Silicon team to develop custom silicon solutions powering the future of Google's direct-to-consumer products. As an ASIC Power Management Architect, you'll be at the forefront of innovation, working on hardware experiences that impact millions of users worldwide. The role combines advanced power management architecture with practical implementation, requiring expertise in ASIC power analysis, algorithm development, and system-level optimization.

You'll work with cutting-edge technologies, defining power management architectures that balance exceptional performance with power and thermal constraints. The position demands deep technical knowledge of power components, voltage scaling, and power delivery networks, while also understanding the broader impact of software and architectural decisions on system behavior.

Google's commitment to innovation in AI, Software, and Hardware makes this an exciting opportunity to shape the next generation of technology. You'll collaborate with world-class engineers and researchers, contributing to products that make computing faster, seamless, and more powerful. The role offers the chance to work on challenging technical problems while delivering tangible impact through Google's widely-used products.

The ideal candidate combines strong technical expertise in power management with the ability to analyze and document complex trade-offs. You'll need to think both deeply about technical details and broadly about system-level implications. This position offers the opportunity to work at the intersection of hardware and software, optimizing power management across multiple design levels.

Working at Google means joining a company that values diversity, equity, and inclusion, with comprehensive benefits and a culture focused on innovation and impact. You'll be part of a team that pushes boundaries and sets new standards in silicon design and power management.

Last updated 14 minutes ago

Responsibilities For ASIC Power Management Architect, Silicon

  • Define ASIC power management architecture details for an ASIC to deliver exceptional performance under power and thermal constraints
  • Perform algorithm development, modeling and analysis of power management approaches
  • Model and prototype power management techniques applicable at different design levels
  • Produce detailed documentation for the proposed implementation of power management schemes and produce detailed trade-off analysis for engineering reviews and product roadmap decisions

Requirements For ASIC Power Management Architect, Silicon

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
  • 3 years of experience in power management or power design/methodology
  • Experience with ASIC power analysis methodology

Interested in this job?

Jobs Related To Google ASIC Power Management Architect, Silicon

Senior GPU System Architect

Senior GPU System Architect position at Google, focusing on developing custom silicon solutions and GPU architecture for Tensor SOC, requiring 5+ years of computer architecture experience.

Senior Platform System Architect, Silicon

Senior Platform System Architect position at Google, focusing on Tensor SoC architecture and system design for Pixel devices, combining hardware expertise with AI integration.

Senior CPU RTL Design Engineer

Senior CPU RTL Design Engineer position at Google, focusing on CPU frontend designs and microarchitecture development for next-generation processors.

ASIC Platform Software Architect, Silicon

Senior software architecture role focusing on ASIC platform development for Google's consumer products, combining software expertise with hardware architecture.

System Level Test Engineer, PhD, University Graduate, Google Cloud

System Level Test Engineer position at Google Cloud, focusing on developing and automating system-level manufacturing tests for ASIC's and SoC's, requiring PhD and hardware testing experience.