ASIC Power Management Architect, Silicon

Join Google's innovative hardware team as an ASIC Power Management Architect, where you'll be at the forefront of developing custom silicon solutions that power Google's direct-to-consumer products. This role combines advanced power management expertise with architectural design to create next-generation hardware experiences.

You'll work on defining and implementing power management architectures for ASICs, focusing on delivering exceptional performance while managing power and thermal constraints. The role involves sophisticated algorithm development, modeling, and analysis of power management approaches, requiring deep technical knowledge of power components, PMIC, SMPS, and power delivery networks.

As part of Google's mission to organize the world's information, you'll contribute to the team that combines the best of Google AI, Software, and Hardware to create radically helpful experiences. The position offers the opportunity to work on products used by millions worldwide, requiring expertise in power management techniques like DVFS/AVS, thermal mitigation, and cross-layer policy design.

The ideal candidate will have strong educational background in Electrical or Computer Engineering, with proven experience in power management and ASIC design. You'll collaborate with cross-functional teams to develop detailed documentation, perform trade-off analyses, and make critical decisions that impact product roadmaps.

This role offers the chance to shape the future of Google's hardware products while working with cutting-edge technology and world-class engineers. You'll be part of a team that values innovation, technical excellence, and the creation of products that make a real difference in people's lives.