ASIC Power Management Architect, Silicon
Description For ASIC Power Management Architect, Silicon
Join Google's Silicon team to develop custom silicon solutions powering the future of Google's direct-to-consumer products. As an ASIC Power Management Architect, you'll be instrumental in shaping the next generation of hardware experiences, focusing on delivering unparalleled performance and efficiency.
The role combines advanced power management architecture with practical implementation, requiring expertise in ASIC design, power optimization, and system-level integration. You'll work on cutting-edge solutions for image compute and CPU/GPU systems, ensuring optimal performance under power and thermal constraints.
Working at Google means being part of a team that pushes technological boundaries, developing solutions used by millions worldwide. The position offers the opportunity to collaborate with software and power architecture teams, contributing to system-level designs that impact Google's hardware ecosystem.
Key aspects of the role include defining power management architectures, prototyping and validating solutions, conducting detailed analysis, and producing comprehensive documentation. Your work will directly influence product roadmap decisions and engineering implementations.
This is an ideal position for someone with strong technical expertise in power management, validation experience, and a passion for developing innovative solutions in a collaborative environment. The role offers the chance to work on challenging problems while contributing to Google's mission of organizing the world's information and making it universally accessible and useful.
Responsibilities For ASIC Power Management Architect, Silicon
- Define ASIC power management architecture details for an ASIC that includes functions such as image compute, CPU/GPU
- Prototype and validate for the next generation SoC power management system
- Analyze implementation and models, and test the performance of power management solutions
- Produce detailed documentation for power management schemes implementation
- Collaborate with software and power architecture team to build system level designs and methods
Requirements For ASIC Power Management Architect, Silicon
- Bachelor's degree in Electrical Engineering or equivalent practical experience
- 5 years of experience in power management or post-silicon measurements and validation
- 3 years of experience with power management validation
- Knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation
- Knowledge of the impact of software and architectural design decisions on power and thermal behavior
Jobs Related To Google ASIC Power Management Architect, Silicon
