ASIC Power Management Architect, Silicon
Description For ASIC Power Management Architect, Silicon
Join Google's innovative hardware team as an ASIC Power Management Architect, where you'll be at the forefront of developing custom silicon solutions that power Google's direct-to-consumer products. This role combines advanced power management architecture with Google's cutting-edge AI, software, and hardware capabilities to create transformative computing experiences. You'll be responsible for defining and implementing sophisticated power management strategies for ASICs, ensuring optimal performance while managing power and thermal constraints. The position requires expertise in power analysis methodology, algorithm development, and deep understanding of power management techniques like DVFS/AVS. You'll work on products used by millions worldwide, contributing to Google's mission of organizing world's information and making it universally accessible. The role offers the opportunity to shape next-generation hardware experiences, focusing on exceptional performance, efficiency, and integration. You'll collaborate with cross-functional teams, produce detailed technical documentation, and make critical engineering decisions that influence product roadmaps. This position combines technical depth in power management with the scale and impact of Google's global reach.
Responsibilities For ASIC Power Management Architect, Silicon
- Define ASIC power management architecture details for an ASIC to deliver exceptional performance under power and thermal constraints
- Perform algorithm development, modeling and analysis of power management approaches
- Model and prototype power management techniques applicable at different design levels
- Produce detailed documentation for the proposed implementation of power management schemes and produce detailed trade-off analysis for engineering reviews and product roadmap decisions
Requirements For ASIC Power Management Architect, Silicon
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 3 years of experience in power management or power design/methodology
- Experience with ASIC power analysis methodology
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