ASIC RTL Design Engineer

Google is seeking an ASIC RTL Design Engineer to join their hardware team in Bengaluru. This role is part of Google's initiative to develop custom silicon solutions that power their direct-to-consumer products. The position combines hardware engineering with Google's expertise in AI and software to create innovative computing experiences.

The ideal candidate will work on RTL development using SystemVerilog, perform various quality checks, and participate in critical phases of chip development including synthesis and FPGA/silicon bring-up. This role requires strong technical skills in digital design, particularly with ARM-based SoCs and ASIC methodology.

The position offers an opportunity to work on products that impact millions of users worldwide, focusing on pushing boundaries in hardware performance and efficiency. You'll be part of a multi-disciplinary team working on next-generation hardware experiences.

Key technical requirements include experience with RTL design, scripting languages like Python or Perl, and familiarity with ARM-based SoCs. Preferred qualifications include a Master's degree and experience with IP design for clocking, interconnects, and peripherals.

This is an excellent opportunity for someone passionate about hardware design who wants to contribute to Google's mission of organizing the world's information and making it universally accessible. The role combines technical challenges with the opportunity to work on products that have global impact.