CPU Frontend Design Engineer, Google Cloud, University Graduate
Description For CPU Frontend Design Engineer, Google Cloud, University Graduate
Join Google's ML, Systems & Cloud AI (MSCA) organization as a CPU Frontend Design Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's direct-to-consumer products. This role focuses on central processing unit (CPU) development, a critical component of Google's server System on Chip (SoC).
As part of this position, you'll collaborate with architecture, verification, and physical design engineers to create micro-architectural definitions with RTL coding and run block level simulations. You'll be responsible for the microarchitecture and RTL design implementation of core technology within Google's data center SoC products.
The MSCA organization is responsible for designing, implementing, and managing the hardware, software, machine learning, and systems infrastructure for all Google services and Google Cloud. The team's work impacts billions of users worldwide through services like Search and YouTube, while also driving innovation in hyperscale computing and AI platforms like Vertex AI.
This is an early-career position perfect for graduates with a strong foundation in computer architecture and VLSI design. You'll have the opportunity to work on cutting-edge technology while learning from industry experts in a collaborative environment that prioritizes security, efficiency, and reliability.
Responsibilities For CPU Frontend Design Engineer, Google Cloud, University Graduate
- Define architecture and micro-architecture features, write specifications, and understand implementation tradeoffs
- Define the CPU block level design document
- Perform RTL development process
- Contribute to the SoC level integration, and participate in synthesis, timing/power closure, and silicon bring-up
- Participate in test plan and coverage analysis of the block and SoC-level verification
Requirements For CPU Frontend Design Engineer, Google Cloud, University Graduate
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience
- Experience in full VLSI design cycle
- Experience in RTL implementation of low power designs
- Experience in VLSI development with Verilog, SystemVerilog, System Verilog Assertions (SVA), or VHDL, and with design verification, synthesis, timing/power analysis, and DFT
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