Google is seeking a Design Verification Engineer to join their Google Cloud team, focusing on shaping the future of AI/ML hardware acceleration through TPU (Tensor Processing Unit) technology. This role is part of the ML, Systems, and Cloud AI (MSCA) organization, which is responsible for the hardware, software, and infrastructure powering Google's services and Cloud platform.
The position involves working on cutting-edge TPU technology that powers Google's most demanding AI/ML applications. As an ASIC Design Verification Engineer, you'll be responsible for developing ASICs used to accelerate computation in data centers, participating in project definition, design verification, and silicon bringup. The role requires expertise in SystemVerilog and verification methodologies, with a focus on creating comprehensive verification environments using UVM.
The ideal candidate should have at least 3 years of experience with industry standard tools and methodologies for IC development, along with a strong background in Computer Science or Electrical Engineering. The role offers competitive compensation ranging from $132,000 to $189,000, plus bonus, equity, and benefits.
This is an exciting opportunity to work on innovative hardware solutions that power Google's AI infrastructure, including Google Cloud's Vertex AI platform. You'll be part of a team that prioritizes security, efficiency, and reliability while pushing the boundaries of hyperscale computing. The position offers the chance to work with cutting-edge technology while contributing to products used by billions of people worldwide.
The role is based in Madison, WI, and requires collaboration with design engineers to ensure the delivery of correct design blocks. You'll be responsible for creating verification environments, writing coverage measures, and debugging tests to maintain high quality standards in hardware development. This position offers the opportunity to work on complex technical challenges while being part of Google's mission to advance AI/ML hardware capabilities.