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Formal Verification Lead Engineer, Silicon

Google organizes the world's information and makes it universally accessible and useful, combining AI, Software, and Hardware to create helpful experiences.
Backend
Staff Software Engineer
In-Person
5,000+ Employees
8+ years of experience
AI · Hardware

Description For Formal Verification Lead Engineer, Silicon

Google is seeking a Formal Verification Lead Engineer to join their Silicon team, focusing on developing custom silicon solutions that power Google's direct-to-consumer products. This role combines hardware architecture, formal verification, and system-level design to ensure the reliability and correctness of complex digital systems.

The position requires deep expertise in formal model checking, SystemVerilog, and verification tools, with the responsibility of developing and implementing verification strategies for critical hardware components. The ideal candidate will work at the intersection of hardware architecture and formal methods, translating high-level specifications into verifiable properties.

As part of Google's hardware team, you'll contribute to innovations that impact millions of users worldwide, working on next-generation hardware experiences that deliver unparalleled performance and efficiency. The role offers the opportunity to work with cutting-edge technology while collaborating with world-class engineers and architects.

The position combines technical leadership with hands-on verification work, requiring both strategic thinking and detailed implementation skills. You'll be responsible for developing reusable verification components and ensuring the architectural correctness of complex systems through formal methods.

This is an excellent opportunity for someone passionate about hardware verification, formal methods, and system architecture, wanting to make a significant impact on Google's hardware ecosystem. The role offers the chance to work on challenging problems while contributing to products that shape the future of computing.

Last updated 2 days ago

Responsibilities For Formal Verification Lead Engineer, Silicon

  • Partner with hardware architects for formal specifications and verification of system-level properties
  • Develop highly abstract models of various designs and prove architectural correctness within a model and consistency across models
  • Plan formal verification strategy, create the properties and constraints for complex digital design blocks
  • Translate system-level formal specifications into precise constraints for individual logical blocks
  • Architect and implement reusable formal verification components

Requirements For Formal Verification Lead Engineer, Silicon

Python
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 8 years of experience with formal model checking for ASICs and FPGAs, SystemVerilog and SystemVerilog Assertions
  • Experience with formal verification EDA tools
  • Experience with model checking frameworks such as Murphi or TLA+

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