Hardware Architecture Modeling Engineer, TPU
Description For Hardware Architecture Modeling Engineer, TPU
Google is seeking a Hardware Architecture Modeling Engineer to join their TPU (Tensor Processing Unit) team, focusing on shaping the future of AI/ML hardware acceleration. This role offers an exciting opportunity to work on cutting-edge technology that powers Google's most demanding AI/ML applications.
The position involves working with a diverse team that pushes boundaries in custom silicon solutions, specifically focusing on TPU architecture and its integration within AI/ML-driven systems. You'll collaborate closely with hardware and software architects to model, analyze, and define next-generation TPUs, contributing directly to the innovation behind products used by millions worldwide.
Key responsibilities include ML workload characterization, performance and power analyses, developing architectural models, and collaborating across multiple teams for effective hardware/software codesign. The role requires strong expertise in computer architecture, software development (particularly C++), and a deep understanding of ML hardware acceleration.
The position offers competitive compensation ($127,000-$187,000) plus bonus, equity, and comprehensive benefits. You'll be part of Google's Technical Infrastructure team, working behind the scenes to maintain and develop the architecture that keeps Google's product portfolio running smoothly.
This is an excellent opportunity for someone with a background in computer architecture and ML hardware acceleration who wants to make a significant impact on the future of AI technology. You'll work in a collaborative environment that values innovation, technical excellence, and creative problem-solving, while contributing to products that affect users worldwide.
The role combines technical depth with strategic thinking, as you'll not only work on current technologies but also help shape the roadmap for future TPU generations. If you're passionate about hardware architecture, ML acceleration, and want to work at the forefront of AI technology, this position offers the perfect blend of challenge and opportunity.
Responsibilities For Hardware Architecture Modeling Engineer, TPU
- Work on Machine Learning (ML) workload characterization and benchmarking
- Conduct performance and power analyses and quantitatively evaluate proposals
- Develop architectural and microarchitectural models to enable quantitative analysis
- Collaborate with partners in hardware design, software, compiler, Machine Learning (ML) model and research teams for effective hardware/software codesign
- Propose capabilities and next-generation TPUs and chip roadmap
Requirements For Hardware Architecture Modeling Engineer, TPU
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 3 years of experience in computer architecture performance analysis, or a PhD degree in lieu of industry experience
- Experience in developing software systems in C++
- Experience in applying computer architecture principles to solve open-ended problems
- Experience in analyzing workload performance and creating benchmarks
- Experience in hardware and software co-design
- Experience developing in Python
- Knowledge of design of digital logic at the Register Transfer Level (RTL) using Verilog
- Knowledge of processor design or accelerator designs and mapping Machine Learning (ML) models to hardware architectures
Benefits For Hardware Architecture Modeling Engineer, TPU
- bonus
- equity
- benefits
