Join Google Cloud's innovative team as a Networking RTL Design Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's data center infrastructure. This role combines deep expertise in ASIC architecture with networking protocols to create next-generation data center accelerators. You'll be part of the ML, Systems & Cloud AI (MSCA) organization, working on critical infrastructure that supports Google's global services and Cloud platform.
The position requires extensive experience in networking ASIC design, from specification to production, with a focus on RDMA, packet processing, and system design principles for optimal performance. You'll collaborate with cross-functional teams to develop RTL for ASIC subsystems, working on everything from micro-architecture to timing closure.
As a key member of the team, you'll evaluate future ASIC designs, develop new layer protocols, and define hardware/software interfaces that push the boundaries of data center networking. Your work will directly impact the efficiency and reliability of Google's global infrastructure, contributing to services used by billions of people worldwide.
The role offers the opportunity to work with cutting-edge technology in a team that prioritizes security, efficiency, and reliability. You'll be involved in shaping the future of hyperscale computing, working alongside experts in the field and contributing to Google's leading position in cloud infrastructure and AI platforms like Vertex AI.
This is an ideal position for someone who combines deep technical expertise in ASIC design with a passion for networking protocols and system architecture, offering the chance to make a significant impact on Google's next-generation data center technology.