PHY Design IP Integration Engineer

Join Google's Tensor Processing Unit (TPU) interface design team as a PHY Design IP Integration Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's direct-to-consumer products. This role is part of the ML, Systems, & Cloud AI (MSCA) organization, which is responsible for the hardware, software, and infrastructure that powers Google's services and Cloud platform.

As a PHY Design IP Integration Engineer, you'll play a crucial role in improving the performance and power efficiency of TPUs through the selection, integration, and execution of high-speed IO Design IPs. This highly cross-functional position involves coordinating with various teams throughout the silicon lifecycle, from design and verification to physical design and post-silicon validation.

The position offers a competitive base salary range of $132,000-$189,000, plus bonus, equity, and comprehensive benefits. You'll be working in Sunnyvale, CA, contributing to Google's mission of advancing hyperscale computing and AI technology. The role requires a bachelor's degree in a relevant field and 3 years of experience in analog design, with opportunities to work on cutting-edge technology that impacts billions of users worldwide.

You'll be part of a team that prioritizes security, efficiency, and reliability, working on projects that include Google Cloud's Vertex AI platform and other innovative technologies. This role offers the chance to shape the future of hardware experiences while delivering unparalleled performance and integration.

The position requires strong technical expertise in PHY IP design and integration, combined with excellent coordination and communication skills to work effectively across multiple teams. You'll be involved in the entire product lifecycle, from initial planning and requirements gathering to final validation and implementation.