Physical Design Engineer, Static Timing Analysis, Google Cloud

Join Google Cloud as a Physical Design Engineer specializing in Static Timing Analysis, where you'll be at the forefront of AI/ML hardware acceleration. This role offers an exciting opportunity to work on cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications.

As part of the ML, Systems, & Cloud AI (MSCA) organization, you'll be instrumental in designing and implementing hardware infrastructure that supports all Google services and Google Cloud. The position involves working on the physical implementation of ASICs using advanced technology nodes, focusing on constraint development, validation, and timing closure of complex high-performance compute ASICs.

Your responsibilities will include developing static timing methodologies, managing margins, creating automation scripts, and providing comprehensive documentation. You'll collaborate closely with architecture, logic design, and Design for Testing (DFT) teams to understand and implement requirements. The role requires expertise in static timing analysis, EDA tools, and Tcl programming.

The position offers competitive compensation ($132,000-$189,000 base salary) plus bonus, equity, and comprehensive benefits. You'll be part of a team that prioritizes security, efficiency, and reliability while driving towards shaping the future of hyperscale computing. The impact of your work will be felt across Google's global infrastructure, including Google Cloud's Vertex AI platform.

This is an excellent opportunity for someone with strong technical skills in physical design and timing analysis who wants to contribute to groundbreaking AI/ML hardware development. You'll be working in Sunnyvale, CA, collaborating with talented engineers and having a direct impact on products used by billions of people worldwide.