RTL Design Engineer

Join Google's innovative hardware team as an RTL Design Engineer, where you'll be instrumental in developing custom silicon solutions that power Google's direct-to-consumer products. As part of the team designing interconnect IP for Pixel System on Chip (SoCs), you'll collaborate across multiple disciplines including architecture, software, verification, power, and timing. Your role involves specifying and delivering high-quality Register-Transfer Level (RTL) designs, solving complex technical challenges in micro-architecture, and optimizing for performance, power, and area.

The position requires expertise in Hardware IP design using Verilog/System Verilog, deep understanding of microarchitecture, and proficiency with RTL quality check tool flows. You'll be working on cutting-edge technology that impacts millions of users worldwide, contributing to Google's mission of organizing world's information and making it universally accessible.

The ideal candidate brings strong technical skills in digital design, experience with ARM-based SoCs and protocols, and programming capabilities in languages like Perl or Python. You'll be part of a team that pushes boundaries in hardware development, creating solutions that combine the best of Google AI, Software, and Hardware to deliver radically helpful experiences.

This role offers the opportunity to work on next-generation hardware experiences, focusing on unparalleled performance, efficiency, and integration. You'll be at the forefront of innovation, working with state-of-the-art tools and technologies while collaborating with talented professionals across Google's global offices.