RTL Design Engineer

Join Google's innovative hardware team as an RTL Design Engineer, where you'll be instrumental in developing custom silicon solutions that power Google's direct-to-consumer products. As part of the team designing interconnect IP for Pixel System on a Chip (SoCs), you'll work at the cutting edge of hardware development, collaborating with experts across architecture, software, verification, power, and timing domains.

The role combines hardware IP design using Verilog/System Verilog with microarchitecture development, requiring expertise in RTL quality check tool flows and ARM-based SoCs. You'll be responsible for delivering quality Register-Transfer Level (RTL) designs while solving complex technical challenges in micro-architecture and low power design methodology.

This position offers the opportunity to directly impact millions of users worldwide through Google's hardware experiences. You'll be working with state-of-the-art technology, contributing to the next generation of Google's direct-to-consumer products while focusing on unparalleled performance, efficiency, and integration.

The ideal candidate brings strong technical expertise in hardware design, demonstrated through experience with RTL development, quality check tools, and synthesis processes. You'll need to balance technical excellence with collaborative skills, working effectively with multi-disciplined and multi-site teams to drive innovation in hardware development.

Join a team that combines the best of Google AI, Software, and Hardware to create radically helpful experiences, making computing faster, seamless, and more powerful while improving people's lives through technology.