Senior CPU Subsystem RTL Design Engineer, Silicon
Description For Senior CPU Subsystem RTL Design Engineer, Silicon
Google is seeking a Senior CPU Subsystem RTL Design Engineer to join their Silicon team, focusing on developing custom silicon solutions that power Google's direct-to-consumer products. This role combines hardware expertise with Google's AI capabilities to create next-generation computing experiences. The position involves working on high-performance CPU and AI accelerator designs, requiring deep knowledge of microarchitecture and RTL design.
The ideal candidate will have extensive experience in CPU/SOC design and integration, with a strong background in hardware description languages and front-end design methodologies. They will be responsible for developing CPU subsystem designs that meet performance, power, and area goals while working closely with verification and physical design teams.
This role offers the opportunity to work on cutting-edge technology that impacts millions of users worldwide. The position is based in New Taipei City, Taiwan, where you'll be part of a team pushing the boundaries of hardware innovation. You'll contribute to Google's mission of organizing the world's information while developing solutions that make computing faster, more seamless, and more powerful.
The role requires collaboration across multiple teams, including verification, physical design, and power teams, making strong communication skills essential. You'll be involved in all aspects of the design process, from microarchitecture definition to SOC integration, working with modern design techniques and methodologies.
Google offers a collaborative environment where you'll work with talented engineers and researchers, with access to cutting-edge resources and tools. This position represents an excellent opportunity for experienced hardware engineers looking to make a significant impact in the field of custom silicon design while working on products that directly affect users' daily lives.
Responsibilities For Senior CPU Subsystem RTL Design Engineer, Silicon
- Participate in developing CPU or AI accelerator design and deliveries into SOC
- Develop CPU subsystem front-end designs, emphasizing on microarchitecture and RTL design for the next generation CPU
- Deliver designs that meet PPA and functional goals with modern techniques, interpret the techniques into design constructs
- Work with the verification team to ensure production of quality designs, and the physical design and power teams to meet frequency, power, and area goals
Requirements For Senior CPU Subsystem RTL Design Engineer, Silicon
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience in high-performance CPU or AI accelerator logic/RTL design/integration including microarchitecture definition and PPA optimizations
- Experience with a HDL language and front-end design methodology
- Experience with CPU, cache subsystem integration with SOC
- Experience with RTL static checks, like lint and CDC
Jobs Related To Google Senior CPU Subsystem RTL Design Engineer, Silicon
