Senior Design For Testability Engineer, Silicon
Description For Senior Design For Testability Engineer, Silicon
Join Google's innovative hardware team as a Senior Design For Testability Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's direct-to-consumer products. This role combines advanced technical expertise in DFT/DFD methodologies with hands-on implementation of critical testing infrastructure for silicon designs.
You'll work on cutting-edge projects that directly impact millions of users worldwide, implementing and verifying various testing mechanisms including memory built-in self test (MBIST), scan chains, and DFT compression. The role requires deep expertise in silicon engineering, test plan creation, and post-silicon validation activities.
As part of Google's mission to organize the world's information, you'll contribute to the team that combines the best of Google AI, Software, and Hardware to create radically helpful experiences. The position offers the opportunity to work with state-of-the-art EDA tools and collaborate with internal teams and vendors to advance testing methodologies.
The ideal candidate brings 5+ years of experience in DFT/DFD flows, strong technical background in electrical or computer engineering, and expertise in industry-standard testing tools and methodologies. You'll be responsible for defining specifications, developing new technology node implementations, and ensuring the quality and testability of Google's silicon products.
This role offers the chance to work at a company known for innovation, with access to cutting-edge technology and the opportunity to impact products used by millions. You'll be part of a team pushing the boundaries of hardware development, working in an environment that values technical excellence and innovative thinking.
Responsibilities For Senior Design For Testability Engineer, Silicon
- Define Design for Excellence (DFX) specifications and develop flows and methodologies for new technology node implementation
- Implement/Integrate and verify Design for Testing (DFT) logic
- Work with silicon engineering team to create test plans and generate test patterns
- Participate in post-silicon activity like bring up, diagnostics and characterization
- Work with EDA and IP vendors to incorporate state-of-the-art DFT/DFD/DFY flows and methodologies
Requirements For Senior Design For Testability Engineer, Silicon
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience in DFT/DFD flows and methodologies
- Experience working with fault modeling, test standards and industry DFT/DFD/ATPG tools
- Experience with Application-Specific Integrated Circuits (ASIC) DFT, synthesis, simulation and verification flow
- Experience developing DFT specifications and driving DFT architecture
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