Senior SOC and IP Design Engineer, Google Cloud
Description For Senior SOC and IP Design Engineer, Google Cloud
Join Google's ML, Systems, & Cloud AI (MSCA) organization as a Senior SOC and IP Design Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's direct-to-consumer products. This role combines hardware expertise with cutting-edge technology development, focusing on the design and implementation of System-on-Chip (SOC) and IP components.
You'll be working with a team that designs, implements, and manages the hardware infrastructure for all Google services (including Search, YouTube) and Google Cloud. The position requires deep expertise in digital logic design, RTL development, and verification, with opportunities to impact billions of users worldwide.
The role involves complex technical challenges in SOC architecture, high-performance design, and low-power techniques. You'll be responsible for everything from defining block-level design documents to participating in silicon bring-up, requiring both technical depth and broad system understanding.
This is an excellent opportunity for experienced hardware engineers who want to work on large-scale, impactful projects. You'll be part of Google's initiative to shape the future of hyperscale computing, working with state-of-the-art technology including TPUs and contributing to Google Cloud's AI infrastructure.
The position offers the chance to work with multi-disciplined teams across multiple sites, combining technical expertise with collaborative skills. You'll be contributing to projects that directly impact Google's ability to deliver efficient, secure, and reliable services to billions of users.
Responsibilities For Senior SOC and IP Design Engineer, Google Cloud
- Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
- Perform RTL development, function/performance simulation debug and Lint/CDC/Formal Verification/UPF checks
- Participate in synthesis, timing/power closure, and ASIC silicon bring-up
- Participate in test plan and coverage analysis of the block and SOC-level verification
- Communicate and work with multi-disciplined and multi-site teams
Requirements For Senior SOC and IP Design Engineer, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience
- 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or System Verilog
- Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques
- Experience in logic design and debug with Design Verification (DV)
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