Senior SoC Design Verification Engineer, Google Cloud
Description For Senior SoC Design Verification Engineer, Google Cloud
Google Cloud is seeking a Senior SoC Design Verification Engineer to join their team developing custom silicon solutions for Google's direct-to-consumer products. This role is part of the Technical Infrastructure team, working on server chip design and verification. The position requires expertise in digital design verification, with a focus on building verification components, constrained-random testing, and system testing.
The ideal candidate will work closely with design and verification engineers, creating efficient verification environments that thoroughly test designs through corner cases. They will manage the complete verification lifecycle from planning to coverage closure. The role involves working with cutting-edge technology that powers Google's extensive product portfolio.
This is an opportunity to shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. The position offers the chance to work on projects that impact millions of users worldwide, verifying digital designs that are crucial to Google's infrastructure.
The role requires strong technical skills in SystemVerilog, UVM, and formal verification tools, combined with the ability to collaborate effectively with cross-functional teams. The successful candidate will contribute to Google's innovation in custom silicon solutions while working in either Tel Aviv or Haifa, Israel.
Google offers a collaborative work environment, the chance to work on cutting-edge technology, and the opportunity to be part of a team that pushes boundaries in hardware development. The position combines technical depth with the broad impact of working at one of the world's leading technology companies.
Responsibilities For Senior SoC Design Verification Engineer, Google Cloud
- Plan the verification of digital design blocks by fully understanding the design specification
- Create and enhance constrained-random verification environments using SystemVerilog and UVM
- Identify and write all types of coverage measures for corner-cases
- Debug tests with design engineers to deliver functionally correct design blocks
- Close coverage measures to identify verification holes and show progress towards tape-out
Requirements For Senior SoC Design Verification Engineer, Google Cloud
- Bachelor's degree in Electrical Engineering or equivalent practical experience
- 8 years of experience with creating and using verification components and environments in standard verification methodology
- Experience verifying digital systems using standard IP components/interconnects
- Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs
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