Senior Staff CPU RTL Design Engineer
Description For Senior Staff CPU RTL Design Engineer
Google is seeking a Senior Staff CPU RTL Design Engineer to join their hardware team developing custom silicon solutions for direct-to-consumer products. This role focuses on CPU subsystem development and microarchitecture design for next-generation processors. The position requires extensive experience in digital logic design and RTL concepts, with opportunities to shape innovative hardware experiences. The ideal candidate will work at the intersection of hardware architecture and performance optimization, collaborating with cross-functional teams including Software, Architecture, and Performance teams. This role offers the chance to impact millions of users through Google's hardware products while pushing the boundaries of CPU design. The position demands both technical expertise and leadership skills, as you'll be responsible for proposing and implementing performance enhancements while ensuring quality through collaboration with verification and physical design teams. Google offers a collaborative environment with opportunities to work on cutting-edge technology, making this an excellent opportunity for experienced hardware engineers looking to make a significant impact in consumer technology.
Responsibilities For Senior Staff CPU RTL Design Engineer
- Participate in developing CPU subsystem. Develop CPU subsystem front-end designs, emphasizing on microarchitecture and RTL design for the next generation CPU
- Propose performance enhancing microarchitecture features, and work with Software, Architect, and Performance teams for trade-off studies
- Communicate the pros and cons of microarchitecture enhancements. Deliver designs, meeting Performance Power Area(PPA) goals with production quality
- Work with the Verification team to ensure production of quality designs, and the physical design and power teams to meet frequency, power, and area goals
- Become familiar with modern techniques, interpret the techniques into design constructs, and languages in order to provide guidance to and participate in the performance evaluation effort
Requirements For Senior Staff CPU RTL Design Engineer
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 10 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
- Experience with RTL language (System Verilog) and related design processes (e.g., Lint, UPF)
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