Senior Tensor Processing Unit Architect, Silicon
Description For Senior Tensor Processing Unit Architect, Silicon
Google is seeking a Senior Tensor Processing Unit Architect to join their CoreIP Hardware Architecture team, focusing on developing custom silicon solutions that power Google's direct-to-consumer products. This role combines hardware architecture expertise with TPU development, requiring deep understanding of machine learning accelerator design and optimization.
The position involves working on next-generation Tensor SOC architecture, with a focus on performance, power, and area optimization based on machine learning workload analysis. You'll be responsible for defining and delivering TPU hardware IP architecture specifications, performing detailed analysis, and collaborating across multiple teams including algorithm, power, and performance groups.
As part of Google's mission to organize the world's information and make it universally accessible, you'll contribute to creating radically helpful experiences by combining Google AI, Software, and Hardware. The role requires expertise in computer architecture, silicon design, and machine learning accelerator development, making it ideal for someone with both technical depth and cross-functional collaboration skills.
The position offers the opportunity to shape the future of Google's hardware experiences, working on cutting-edge technology that impacts millions of users worldwide. You'll be part of a team that pushes boundaries in custom silicon development, focusing on unparalleled performance, efficiency, and integration.
This is an excellent opportunity for an experienced architect who wants to make a significant impact on Google's hardware ecosystem, working with state-of-the-art technology and collaborating with world-class teams across the organization.
Responsibilities For Senior Tensor Processing Unit Architect, Silicon
- Work on TPU (Tensor Processing Unit) architecture for the next-generation Tensor SOC to boost Performance, Power and Area based on machine learning workload analysis
- Define and deliver the TPU hardware IP architecture specifications that meet power, performance, area goals, owning the goals through to tape-out and product launch
- Perform detailed data analysis and tradeoff evaluations to improve our TPU architecture solutions
- Propose architectural features/requirements for TPU to integrate TPU with Tensor SOC to improve overall performance
- Collaborate with implementation teams to drive the TPU hardware IP architecture specifications into design implementation for SoCs
Requirements For Senior Tensor Processing Unit Architect, Silicon
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 5 years of experience working with TPU or parallel processor architecture (such as VPU/DSP) and silicon design
- Experience in micro-architecture, power and performance optimization
- Experience collaborating cross-functionally with SoC architecture, IP design and verification, algorithm and software development teams
- Experience in machine learning algorithm, workloads analysis, performance/power evaluation, and architecture optimizations
- Experience with architecting and designing TPU hardware IP (or machine learning accelerator) for SoCs
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