Senior Tensor Processing Unit Architect, Silicon
Description For Senior Tensor Processing Unit Architect, Silicon
Google is seeking a Senior Tensor Processing Unit (TPU) Architect to join their CoreIP Hardware Architecture team, focusing on developing custom silicon solutions that power Google's direct-to-consumer products. This role combines hardware architecture expertise with machine learning acceleration, requiring deep understanding of TPU architecture and silicon design.
The position involves working on next-generation Tensor SOC architecture, optimizing for performance, power, and area based on machine learning workload analysis. You'll be responsible for defining and delivering TPU hardware IP architecture specifications, performing detailed analysis, and collaborating across multiple teams including SoC architecture, IP design, verification, and software development.
This is an opportunity to shape the future of Google's hardware experiences, working at the intersection of AI and custom silicon. The role requires strong technical expertise in computer architecture, particularly in TPU or parallel processor architectures, along with experience in machine learning accelerator design.
The ideal candidate will have at least 5 years of relevant experience and strong educational background in Electrical Engineering, Computer Engineering, or Computer Science. They should be comfortable with cross-functional collaboration and have demonstrated experience in performance/power evaluation and architecture optimizations.
Working at Google's hardware team means being part of a mission to create radically helpful experiences by combining the best of Google AI, Software, and Hardware. The team researches, designs, and develops new technologies to make computing faster, seamless, and more powerful, ultimately aiming to improve people's lives through technology.
Responsibilities For Senior Tensor Processing Unit Architect, Silicon
- Work on TPU architecture for the next-generation Tensor SOC to boost Performance, Power and Area based on machine learning workload analysis
- Define and deliver the TPU hardware IP architecture specifications that meet power, performance, area goals
- Perform detailed data analysis and tradeoff evaluations to improve TPU architecture solutions
- Propose architectural features/requirements for TPU to integrate TPU with Tensor SOC to improve overall performance
- Collaborate with implementation teams to drive the TPU hardware IP architecture specifications into design implementation for SoCs
Requirements For Senior Tensor Processing Unit Architect, Silicon
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 5 years of experience working with TPU or parallel processor architecture (such as VPU/DSP) and silicon design
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science preferred
- Experience in micro-architecture, power and performance optimization
- Experience collaborating cross-functionally with SoC architecture, IP design and verification, algorithm and software development teams
- Experience in machine learning algorithm, workloads analysis, performance/power evaluation, and architecture optimizations
- Experience with architecting and designing TPU hardware IP (or machine learning accelerator) for SoCs
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