Senior Tensor SOC Performance Design Verification Engineer
Description For Senior Tensor SOC Performance Design Verification Engineer
Join Google's innovative hardware team as a Senior Tensor SOC Performance Design Verification Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's direct-to-consumer products. This role combines the best of Google AI, Software, and Hardware to create groundbreaking experiences used by millions worldwide.
As a senior verification engineer, you'll be responsible for developing simulators and architectural models for Google's Tensor SOC, working closely with system architects and various domain experts. Your work will directly impact the performance and efficiency of future Google hardware products.
The ideal candidate brings strong experience in SOC design/verification, with expertise in verification methodologies and languages like UVM and SystemVerilog. You'll need a deep understanding of digital logic verification at the RTL level and experience with performance model development and analysis.
This is an excellent opportunity for someone passionate about hardware architecture who wants to work on cutting-edge technology that shapes the future of Google's hardware experiences. You'll be part of a team that pushes boundaries in performance, efficiency, and integration, while contributing to Google's mission of organizing the world's information and making it universally accessible and useful.
The role offers the chance to work with world-class experts in various domains including CPU, GPU, and TPU architecture, while having a direct impact on Google's next-generation hardware products. If you're excited about combining hardware expertise with Google's innovative technology to create products that make people's lives better, this role is for you.
Responsibilities For Senior Tensor SOC Performance Design Verification Engineer
- Develop simulators and architectural models of Google's Tensor SOC
- Collaborate with system architects, SoC and CPU/GPU/TPU architects/designers, and software and application experts
- Participate in architectural and design evaluation of Tensor SOC features studies
- Perform pre-silicon performance simulation and correlate with pre and post-silicon measurements
Requirements For Senior Tensor SOC Performance Design Verification Engineer
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience
- 5 years of experience in the SOC design/verification
- 5 years of experience with verification methodologies and languages such as UVM and SystemVerilog
- Experience verifying digital logic at the Register Transfer Level (RTL) using SystemVerilog at Subsystem or Full chip level
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