Senior Tensor SOC Performance Design Verification Engineer
Description For Senior Tensor SOC Performance Design Verification Engineer
Join Google's innovative hardware team as a Senior Tensor SOC Performance Design Verification Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's direct-to-consumer products. This role combines the best of Google AI, Software, and Hardware to create groundbreaking experiences used by millions worldwide.
As a senior engineer, you'll be responsible for developing simulators and architectural models for Google's Tensor SOC, working closely with system architects and various hardware teams. Your expertise in SOC design/verification and deep understanding of verification methodologies will be crucial in ensuring the performance and reliability of Google's custom silicon solutions.
The position requires strong technical skills in SystemVerilog and RTL verification, combined with the ability to collaborate across teams. You'll be working with state-of-the-art technology, contributing to architectural and design evaluations, and performing critical performance simulations.
This is an excellent opportunity for experienced engineers who want to make a significant impact on Google's hardware ecosystem. You'll be part of a team that pushes boundaries in silicon development, working on projects that directly influence the next generation of Google's hardware experiences. The role offers the chance to work with cutting-edge technology while contributing to products that millions of users rely on daily.
Working at Google, you'll benefit from a collaborative environment that combines technical excellence with innovative thinking. The position is based in Bengaluru, India, where you'll be part of Google's growing hardware engineering team.
Responsibilities For Senior Tensor SOC Performance Design Verification Engineer
- Develop simulators and architectural models of Google's Tensor SOC
- Collaborate with system architects, SoC and CPU/GPU/TPU architects/designers, and software and application experts
- Participate in architectural and design evaluation of Tensor SOC features studies
- Perform pre-silicon performance simulation and correlate with pre and post-silicon measurements
Requirements For Senior Tensor SOC Performance Design Verification Engineer
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience
- 5 years of experience in the SOC design/verification
- 5 years of experience with verification methodologies and languages such as UVM and SystemVerilog
- Experience verifying digital logic at the Register Transfer Level (RTL) using SystemVerilog at Subsystem or Full chip level
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