Signoff and Design Methodology Engineer, Silicon

Google is seeking a Signoff and Design Methodology Engineer to join their Silicon team in Bengaluru. This role is part of a team that pushes boundaries in developing custom silicon solutions powering Google's direct-to-consumer products. The position combines hardware expertise with software development, focusing on optimizing Power, Performance, and Area (PPA) for high-performance systems.

The ideal candidate will work at the intersection of hardware and software, dealing with static timing analysis, synthesis, and physical design automation. They will collaborate with Post-Si teams on debugging and optimization, while also working on testchip development using the latest process nodes. The role requires strong technical expertise in RTL languages, timing constraints, and sign-off methodologies.

This is an exciting opportunity to contribute to Google's hardware innovation, directly impacting products used by millions worldwide. The position offers the chance to work with cutting-edge technology and be part of Google's mission to organize the world's information and make it universally accessible and useful.

The role combines technical depth with practical application, requiring both engineering expertise and project management skills. You'll be working with various teams across the organization, from testchip development to product integration, making this an ideal position for someone who enjoys both technical challenges and cross-functional collaboration.