Silicon IP RTL Design Engineer, Google Cloud

Google's Hardware Testing Engineering team is seeking a Silicon IP RTL Design Engineer to join their Google Cloud division. This role is part of the ML, Systems, & Cloud AI (MSCA) organization, which is responsible for designing and implementing hardware and software infrastructure for all Google services and Google Cloud.

The position involves developing Application-specific integrated circuits (ASICs) used to accelerate machine learning computation in data centers. You'll be working on cutting-edge hardware that powers one of the world's largest computing infrastructures. The role requires collaboration with various teams including architecture, verification, power and performance, and physical design to deliver next-generation data center accelerators.

As a Silicon IP RTL Design Engineer, you'll be responsible for microarchitecture and implementation of IPs and subsystems, working closely with Architecture, Firmware, and Software teams. The role involves solving technical problems with micro-architecture and practical reasoning solutions, while evaluating design options for optimal performance and power efficiency.

The position offers the opportunity to work on significant projects that impact Google's global infrastructure and cloud services. You'll be part of a team that prioritizes security, efficiency, and reliability while driving towards shaping the future of hyperscale computing. The role directly contributes to Google Cloud's Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

This is an excellent opportunity for experienced hardware engineers who want to work on cutting-edge technology at scale, particularly those interested in machine learning acceleration and data center infrastructure. The role combines technical depth in hardware design with the broad impact of Google's global infrastructure.