Silicon RTL IP/Subsystem Senior Engineer, Google Cloud
Description For Silicon RTL IP/Subsystem Senior Engineer, Google Cloud
Join Google Cloud's innovative team as a Senior Silicon RTL IP/Subsystem Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's next-generation data center accelerators. This role is part of the ML, Systems, & Cloud AI (MSCA) organization, which is responsible for the hardware and software infrastructure supporting all Google services and Google Cloud.
You'll work on developing Application-specific integrated circuits (ASICs) specifically focused on accelerating machine learning computation in data centers. The position requires deep expertise in ASIC development, microarchitecture design, and system integration, where you'll collaborate with cross-functional teams including architecture, verification, power and performance, and physical design experts.
As a senior engineer, you'll be responsible for solving complex technical problems through microarchitecture and practical reasoning solutions, while evaluating design options considering complexity, performance, and power requirements. The role offers the opportunity to shape the future of hyperscale computing and contribute to Google's global impact through projects like Google Cloud's Vertex AI platform.
The position combines technical leadership with hands-on development, requiring both depth in hardware design and breadth across various aspects of system architecture. You'll be working in Bengaluru, contributing to Google's mission of developing cutting-edge hardware solutions that power billions of users worldwide.
This is an excellent opportunity for experienced hardware engineers who want to work on challenging problems at scale, with access to Google's vast resources and the chance to impact the future of cloud computing and machine learning acceleration.
Responsibilities For Silicon RTL IP/Subsystem Senior Engineer, Google Cloud
- Own microarchitecture and implementation of Internet Protocol (IPs) and subsystems
- Work with Architecture, Firmware, and Software teams to drive feature closure and develop microarchitecture specifications
- Drive design methodology, libraries, debug, code review in coordination with other Internet Protocol (IPs) Design Verification (DV) teams and physical design teams
- Identify and drive power, performance and area of improvements
Requirements For Silicon RTL IP/Subsystem Senior Engineer, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 5 years of experience in Application-specific integrated circuit (ASIC) development with Verilog/SystemVerilog, Vhsic Hardware Description Language (VHDL), or Chisel
- Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT)
- Experience in micro-architecture and designing IPs and subsystems
Jobs Related To Google Silicon RTL IP/Subsystem Senior Engineer, Google Cloud
