SoC and IP Design Engineer, Google Cloud
Description For SoC and IP Design Engineer, Google Cloud
Join Google Cloud's innovative hardware team as a SoC and IP Design Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's future direct-to-consumer products. As part of the ML, Systems, & Cloud AI (MSCA) organization, you'll work on critical hardware infrastructure that supports Google's global services including Search, YouTube, and Google Cloud.
The role combines deep technical expertise in digital design, RTL development, and system architecture with the opportunity to shape next-generation hardware experiences. You'll be responsible for defining and implementing complex System on Chip designs, optimizing for performance and power efficiency, and working with cutting-edge verification methodologies.
This position offers the chance to work with world-class engineers across multiple disciplines, contributing to projects that directly impact billions of users. You'll be involved in the complete development cycle from architectural definition through silicon bring-up, utilizing advanced tools and methodologies in a collaborative environment.
The ideal candidate brings strong experience in digital design principles, RTL development, and verification, combined with knowledge of modern SoC architectures and interfaces. This role provides excellent growth opportunities within Google's hardware organization while working on challenging technical problems at scale.
Working at Google Cloud means being part of a team that prioritizes security, efficiency, and reliability while pushing the boundaries of hyperscale computing. You'll contribute to Google's mission of organizing the world's information while helping to shape the future of cloud computing and artificial intelligence infrastructure.
Responsibilities For SoC and IP Design Engineer, Google Cloud
- Define the System on a Chip (SoC)/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
- Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, SystemVerilog), function/performance simulation debug and Lint/CDC/FV/UPF checks
- Participate in synthesis, timing/power closure and Application-specific integrated circuit (ASIC) silicon bring-up
- Participate in test plan and coverage analysis of the block and SoC level verification
- Communicate and work with multi-disciplined and multi-site teams
Requirements For SoC and IP Design Engineer, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience with digital reasoning design principles, Register-Transfer Level (RTL) design concepts, and languages such as Verilog or SystemVerilog
- Experience with reasoning synthesis techniques to optimize RTL code, performance and power with low-power design techniques
- Experience with design sign-off and quality tools (e.g., Lint, CDC, etc.)
- Experience in reasoning design and debug with Design Verification (DV)
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